What are Flip Flops?
Outside of the basic logic gates, perhaps the most fundamental building block of digital logic systems is the flip flop. While the name may bring to mind sandals and beaches, this type of flip flop is as far removed as it can be. In the context of digital logic, a flip flop is a circuit with two stable states, essentially on and off. These states can be used to store data, and this data can be changed by adjusting the inputs to the flip flop circuit. This builds the core functionality of the most basic digital storage element.
Types of Flip Flops
SR Flip Flop
Four of these flip flops exist, each one providing slightly different functionality. The simplest of these four is the SR flip flop. This design has two inputs; S, the set input line, and R, the reset line. There are also two outputs in this design, Q and Qn. Q is a direct match to S while Qn is the inverse of the set input line. The truth table for an SR flip flop can be seen in the following table.
| S | R | Q | Qn |
| 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | Z | Z |
As seen in the truth table of the SR flip flop, there’s one major downside to the SR flip flop. It’s possible to assert both the set line and the reset line at the same time. When this happens it causes contention on the output lines, resulting in a high impedance conflict state. While this can be useful in specific situations, it’s generally not ideal for a binary state data storage system.
JK Flip Flop and T Flip Flop
Due to the downside of the SR flip flop, mentioned in the previous section, additional flip flop designs are necessary. The JK flip flop solves this issue by modifying the internal gate structure. Rather than using the two input AND gates, JK flip flops use three input and gates, allowing for feedback from the outputs, essentially making the next state dependent not just on J and K but also the current state of the flip flop. This results in the following truth table.
| J | K | Q_cur | Q_nxt | Qn_cur | Qn_nxt |
| 0 | 0 | 0 | 0 | 1 | 1 |
| 0 | 0 | 1 | 1 | 0 | 0 |
| 0 | 1 | 0 | 0 | 1 | 1 |
| 0 | 1 | 1 | 0 | 0 | 1 |
| 1 | 0 | 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 1 | 0 | 0 |
| 1 | 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 | 1 |
An evolution of the JK flip flop is the T flip flop. By connecting the J and K inputs together from the JK flip flop, a circuit is created that will only transition on a clock edge. The T flip flop truth table and schematic are as follows.
| T | Q_cur | Q_nxt | Qn_cur | Qn_nxt |
| 0 | 0 | 0 | 1 | 1 |
| 0 | 1 | 1 | 0 | 0 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 0 | 1 |
D Flip Flop
The fourth and final flip flop is perhaps the most widely used. Similar to the T flip flop, it has a single input and only transitions on a clock edge. The main difference is that by adding an inverter between the two input AND gates, a circuit is created whose next state output is always equal to the current input. This design does not examine the current state as part of the condition for the next state. Rather relying purely on the clock to transition to the next state and always passing the current input as the output in the next state. Resulting in the following truth table.
| D | Q_nxt | Qn_nxt |
| 0 | 0 | 1 |
| 1 | 1 | 0 |
Common Flip Flop Uses
Perhaps the most common use of flip flops is for counters, however they are also commonly used in the design of shift registers, storage registers and frequency/clock dividers. Their ability to ripple data through a sequence of flip flops is instrumental to these applications. These use cases will be further examined and explained in future posts and pages.